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Analyzed about 21 hours ago. based on code collected about 21 hours ago.

Project Summary

80186 compatible SystemVerilog CPU core and FPGA reference design

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Project Security

Vulnerabilities per Version ( last 10 releases )

There are no reported vulnerabilities

Project Vulnerability Report

Security Confidence Index

Poor security track-record
Favorable security track-record

Vulnerability Exposure Index

Many reported vulnerabilities
Few reported vulnerabilities

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About Project Security

Languages

C++
60%
Ruby
14%
Python
10%
5 Other
16%

30 Day Summary

Jul 11 2022 — Aug 10 2022

12 Month Summary

Aug 10 2021 — Aug 10 2022
  • 0 Commits
    Down -11 (100%) from previous 12 months
  • 0 Contributors
    Down -1 (100%) from previous 12 months

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