1
I Use This!
Activity Not Available
Analyzed over 1 year ago. based on code collected almost 2 years ago.

Project Summary

Allows electronics engineers and IC designers to create configurable RTL (VHDL/Verilog) IP cores and provides an interface for the user to set up core parameters.

CoreTML is based on a template system which is completely language-neutral and therefore can be used not only semiconductor-related projects.

Tags

No tags have been added

In a Nutshell, CoreTML framework...

 No recognizable code

Open Hub computes statistics on FOSS projects by examining source code and commit history in source code management systems. This project has code locations but that location contains no recognizable source code for Open Hub to analyze.

Quick Reference

GNU Lesser General Public License v3.0 only
Permitted

Commercial Use

Modify

Distribute

Place Warranty

Use Patent Claims

Forbidden

Sub-License

Hold Liable

Required

Distribute Original

Disclose Source

Include Copyright

State Changes

Include License

Include Install Instructions

These details are provided for information only. No information here is legal advice and should not be used as such.

This Project has No vulnerabilities Reported Against it

Did You Know...

  • ...
    65% of companies leverage OSS to speed application development in 2016
  • ...
    compare projects before you chose one to use
  • ...
    use of OSS increased in 65% of companies in 2016
  • ...
    by exploring contributors within projects, you can view details on every commit they have made to that project

 No recognizable code

Open Hub computes statistics on FOSS projects by examining source code and commit history in source code management systems. This project has code locations but that location contains no recognizable source code for Open Hub to analyze.

Community Rating

Be the first to rate this project
Click to add your rating
   Spinner
Review this Project!