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Analyzed about 2 years ago. based on code collected about 2 years ago.

Project Summary

Groundhog implements a SATA host bus adapter. This Verilog-based project creates an easy-to-use interface between a user circuit on a Xilinx FPGA and a SATA hard drive or SSD.

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In a Nutshell, Groundhog - Serial ATA Host Bus Adapter...

This Project has No vulnerabilities Reported Against it

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Languages

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coq
42%
C++
45%
XAML
5%
3 Other
8%

30 Day Summary

Jun 21 2016 — Jul 21 2016

12 Month Summary

Jul 21 2015 — Jul 21 2016

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