ICOM 4215 Fall 2008
Reverse Engineering and Emulation of a Historical Machine
Occasionally it is useful to reverse engineer a product, either because of proprietary limitations or to discover techniques and limitations that might not be anticipated in developing a new product. Also, an running version may have some historical interest. This project is the redign from a partial description of one of the earliest 16-bit microprocessor chipsets. This chipset was used in several early desktop calculators (actually computers) with built-in interpretive languages and quite flexible I/O structures. Programming documentation for this machine was found at http://www.bitsavers.org/ – it is a 17M pdf, so obtain it in the University rather than downloading it at home. The HP Journal articles on the original product are similarly available; LogicWorks and other design data probably are not. Only the BPC (binary processor chip) is required – do not try the IOC (I/O chip) or EMC (Extended math chip) unless you really want to.
Microprogrammed architecture – probably
Implements the BPC instruction set (see the write-ups)
Usable with a 32K x 16 bit flat memory space (wasteful, but silicon is now cheap)
Implements the BPC instruction set in such a way that the bus cycle of the original is preserved. This is where the reverse engineering will be needed.
Single-step mechanism provided
Requirements and definition report (September 9) (progress only, no grade)
This is a statement of how you are going to do the project – what design tools or other information you need. It should also show RTN for the ISA of the target machines. It is just a short content-intensive report – emailed to me.
Organization report (September 25) progress only, no grade)
This describes the organization down to the register level. It should include RTN for everything you define at this stage. Again it is just a short content-intensive report – emailed to me. It also must explain your analysis showing that your RISC definition will emulate the target machine ISA. It is an in-class presentation.
Architecture report (October 14) (50 points)
This is the ISA for your RISC machine and also a description of your microcode organization – explaining how you expect it to satisfy the ISA for the RISC machine. It must describe the underlying architecture of the RISC machine down to the concrete RTN level. This is a more detailed content-intensive report.
Circuit diagrams and microcode (November 13) (100 points)
This is the LogicWorks circuit, the control RTN, and the microcode file for the RISC machine. Also, you need to verify that you can introduce a microcode file to the LogicWorks circuit and cause it to read target machine code. This is to be emailed in a zip file with content-intensive report and all files you generate
Final report and happy hour (November 25) (150 points)
In preparation for this report some sample code for the target machine will be provided. This is a demonstration that your project really works. It is an in-office or in-lab consultation (Happy hour) and also an in-class presentation. The project portfolio and final report must be on hand (electronically) for this festive occasion and ready for emailing
Evaluation Criteria and Work Standards
Evaluation criteria are as shown with the individual deliverables. Note that the first two are identified as progress-only, meaning they are used to let you and me know your project is going in the right direction. All deliverables must be completed in order to pass the course. If you receive an incomplete only in unusual circumstances will you receive higher than C when the incomplete is resolved.
Groups are to be of three people unless I give permission for more or less members. Once formed, no further change in membership will be allowed (except for unavoidable reasons).
All work on the project is to be your own unless it is properly credited and comes from a recognizable source. The work you do must be significant and be distinct from any previous efforts. Work that appears to be just a copy of some project you found on the internet usually is obvious and will result in no credit or possibly even be evidence of plagiarism.
In the event of dissension within the group I will meet only with the entire group, not with individuals. Please resolve your own differences if you can.
These details are provided for information only. No information here is legal advice and should not be used as such.