5
I Use This!
Moderate Activity
Analyzed 6 days ago. based on code collected 14 days ago.

Project Summary

Icarus Verilog is an open source Verilog compiler that supports the IEEE-1364 Verilog HDL including IEEE1364-2005 plus extensions.

Tags

hdl simulate simulation synthesis verilog veriloghdl

In a Nutshell, Icarus Verilog...

Quick Reference

GNU General Public License v2.0 or later
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These details are provided for information only. No information here is legal advice and should not be used as such.

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This Project has No vulnerabilities Reported Against it

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Languages

Languages?height=75&width=75
C++
65%
C
31%
4 Other
4%

30 Day Summary

Jul 6 2019 — Aug 5 2019

12 Month Summary

Aug 5 2018 — Aug 5 2019
  • 78 Commits
    Down -4 (4%) from previous 12 months
  • 9 Contributors
    Up + 3 (50%) from previous 12 months