0
I Use This!
Inactive
Analyzed about 2 hours ago. based on code collected about 3 hours ago.

Project Summary

This project is developed for Full Customer Design Enviroment. Schematic Entry/SPICE/SPICE(RF)/Layout/Verilog-AMS Via /Verilog Via Will be included.

Tags

No tags have been added

In a Nutshell, IC Designers...

This Project has No vulnerabilities Reported Against it

Did You Know...

  • ...
    Black Duck offers a free trial so you can discover if there are open source vulnerabilities in your code
  • ...
    learn about Open Hub updates and features on the Open Hub blog
  • ...
    55% of companies leverage OSS for production infrastructure
  • ...
    compare projects before you chose one to use

Languages

Languages?height=75&width=75
C
55%
C++
21%
Autoconf
7%
21 Other
17%

30 Day Summary

Jul 16 2018 — Aug 15 2018

12 Month Summary

Aug 15 2017 — Aug 15 2018

Ratings

Be the first to rate this project
Click to add your rating
   Spinner
Review this Project!