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Analyzed about 2 years ago. based on code collected over 2 years ago.

Project Summary

PyHVL is a hardware verification language that integrates Python with Verilog.

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In a Nutshell, PyHVL...

This Project has No vulnerabilities Reported Against it

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Languages

Languages?height=75&width=75
Python
88%
C
9%
7 Other
3%

30 Day Summary

Jun 23 2016 — Jul 23 2016

12 Month Summary

Jul 23 2015 — Jul 23 2016

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