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Analyzed about 20 hours ago. based on code collected 1 day ago.

Commit Message	Contributor	Files Modified	Lines Added	Lines Removed	Code Location	Date
May 21, 2023 — May 21, 2024 Showing page 288 of 289 Search / Filter on:
bugfixes due to new hcl jar file	Rimas Avizienis	More...				over 12 years ago
queue data type is now templated	Andrew Waterman	More...				over 12 years ago
more cleanup	Rimas Avizienis	More...				over 12 years ago
moved PCR writeback to end of MEM stage, cleanup of dcache/dpath/ctrl	Rimas Avizienis	More...				over 12 years ago
fixed dtlb bug (swapped r/w permissions), added fake mtfsr/mffsr/fld/fst instructions	Rimas Avizienis	More...				over 12 years ago
fixed dcache amo bug, cleaned up testharness, added RDTIME instruction	Rimas Avizienis	More...				over 12 years ago
writes of PC weren't being sign extended	Rimas Avizienis	More...				over 12 years ago
cleanup	Rimas Avizienis	More...				over 12 years ago
more amo fixes, added more options to testharness to control debug messages	Rimas Avizienis	More...				over 12 years ago
AMOADD, AMOAND, AMOOR, AMOSWAP working	Rimas Avizienis	More...				over 12 years ago
updated riscv-bmarks and riscv-tests to build with new toolchain	Rimas Avizienis	More...				over 12 years ago
made eret instruction take an illegal inst exception when ET is set	Rimas Avizienis	More...				over 12 years ago
added ei and di instructions	Rimas Avizienis	More...				over 12 years ago
flush.i invalidates I$ & ITLB, writing PTBR invalidates both TLBs	Rimas Avizienis	More...				over 12 years ago
added IPIs and timer interrupts	Rimas Avizienis	More...				over 12 years ago
synced up with supervisor mode state in latest ISA simulator	Rimas Avizienis	More...				over 12 years ago
more cache fixes, more test harness debug output	Rimas Avizienis	More...				over 12 years ago
cache/tlb bugfixes, increased memory size to 256meg	Rimas Avizienis	More...				over 12 years ago
fixed typo that broke illegal instruction exception	Rimas Avizienis	More...				over 12 years ago
regenerated instruction encodings using parse-opcodes	Rimas Avizienis	More...				over 12 years ago
timer interrupt fixes	Rimas Avizienis	More...				over 12 years ago
added timer interrupt support	Rimas Avizienis	More...				over 12 years ago
added ld/st misaligned exceptions	Rimas Avizienis	More...				over 12 years ago
added checks for addresses > physical memory size, increased memsize to 64M	Rimas Avizienis	More...				over 12 years ago
cache optimizations, cleanup, and testharness improvement	Rimas Avizienis	More...				over 12 years ago
fixing output enable signals for data/tag SRAMs	Rimas Avizienis	More...				over 12 years ago
more itlb/dtlb/ptw fixes	Rimas Avizienis	More...				over 12 years ago
more tlb/ptw debugging	Rimas Avizienis	More...				over 12 years ago
updated itlb	Rimas Avizienis	More...				over 12 years ago
dcache/dtlb overhaul	Rimas Avizienis	More...				over 12 years ago

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