0
I Use This!
Activity Not Available
Analyzed almost 2 years ago. based on code collected almost 2 years ago.

Project Summary

Signs is a development environment for hardware designs in VHDL and other hardware description languages. It provides synthesis and simulation tools which are fully integrated in an Eclipse plugin including graphical netlist and waveform viewers.

Tags

No tags have been added

In a Nutshell, Signs...

BSD 4-clause (University of California-Specific)
Permitted

Commercial Use

Modify

Distribute

Place Warranty

Forbidden

Hold Liable

Use Trademarks

Required

Include Copyright

Include License

These details are provided for information only. No information here is legal advice and should not be used as such.

All Licenses

This Project has No vulnerabilities Reported Against it

Did You Know...

  • ...
    Black Duck offers a free trial so you can discover if there are open source vulnerabilities in your code
  • ...
    anyone with an Open Hub account can update a project's tags
  • ...
    65% of companies leverage OSS to speed application development in 2016
  • ...
    check out hot projects on the Open Hub

Languages

Languages?height=75&width=75
Java
88%
VHDL
12%
3 Other
<1%

30 Day Summary

Apr 25 2016 — May 25 2016

12 Month Summary

May 25 2015 — May 25 2016

Ratings

Be the first to rate this project
Click to add your rating
   Spinner
Review this Project!