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gle-mips

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  Analyzed about 1 year ago

Welcome to GLE-MiPS This site features a collection of different kind of processors, described in pure vhdl code. All started with a MIPS-like non pipelined cpu from which several branches spawned! Right now the following types of processor are available, but many more will be added in the ... [More] future! GLE-MiPS - A fully working microprocessor, featuring a complete set of mathematical and logical operations over integer numbers, with the addition of two memory modules, RAM and ROM; it is synthetizable both in 32 and in 64 bits mode. A crosscompiler is available, written in Java, 3k-cc. QUATTRO - A microprocessor for small embedded devices, with strict size and speed requirements! Uses 8 bit instructions for a 4 bit architecture. It's basically a shrinked down, 4 bit version of GLE-MiPS (spawned from version 1.1). GLX - A written from scratch processor, implementing a non pipelined DLX structure, with Very Long Instruction Word support, allowing parallel execution of two instructions. It doesn't have the mathematical capabilities of GLE-MiPS but has a revised logicals module and comparison capabilities. News07/08/2008 - QUATTRO 1.1 - Thanks to the knowledge acquired in the GLX development, a newer, faster version of QUATTRO is available! The new structure doesn't use the big GLE-MiPS macroblocks any more, but relies on small modules, achieving greater performance. 05/08/2008 - GLX 1.0 - Finally available, the DLX processor implementation with Very Long Instruction Word support. It comes with physical design reports, Synopsys scripts and the related cross-compiler. 28/07/2008 - GLX PREVIEW - Here is available for download a preview release of a DLX implementation! It's still not complete as it's lacking of the pipeline and several other features, but it's in a good shape for general testing. 25/07/2008 - 3k-cc BETA 1 - After a long time announcement, it is finally here! The compiler for the GLE-MiPS has just been released! It's still a beta as it still needs some testing, but it'a bless for GLE-MiPS testers out there. Older News If you want to help, you are more than welcome! Drop me a mail if you are interested! [Less]

2.66K lines of code

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almost 9 years since last commit

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projetohw

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  Analyzed about 1 year ago

Processador MIPS

8.39K lines of code

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over 10 years since last commit

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if674-simple-mips

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  Analyzed about 2 years ago

Implementacao de um sub-conjunto das instrucoes do MIPS em VHDL

3.01K lines of code

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over 10 years since last commit

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mips-pipeline

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  No analysis available

Implementa en forma parcial el pipeline del microprocesador MIPS en código VHDL.

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Mostly written in language not available
Licenses: GPL-3.0+

teamventure

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  Analyzed about 1 year ago

It's a toy!

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Mostly written in language not available
Licenses: GPL-2.0+

ca-cs6-thu

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  Analyzed about 1 year ago

Just for group developing.

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over 8 years since last commit

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Mostly written in language not available
Licenses: artistic_gpl
Tags mips vhdl

mips2009

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  Analyzed about 1 year ago

Final Project for Computers Architecture, last subject of Computer Engineering, Universidad Nacional de Córdoba, Argentina

8.77K lines of code

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over 7 years since last commit

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Tags mips unc vhdl

pocket-mips

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  Analyzed about 1 year ago

O Processador Pocket-MIPS Monociclo (PMM) é um processador totalmente baseado na máquina MIPS com implementaç˜ao da via de dados monociclo. As instruç˜oes do PMM possuem apenas 1 byte, o ISA é composto por 10 instruções, há quatro registrados de propósito geral visíveis aos usuários (0..3)e cada ... [More] registrador armazena apenas 1 byte. Há outros dois registradores (4..5) que n˜ao s˜ao visíveis aos usuários e também armazenam 1 byte. O projeto consiste da implementação desse processador em VHDL. [Less]

1.55K lines of code

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over 7 years since last commit

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