dps8m

‎GCOS Software Availability ← Older revision Revision as of 08:27, 25 May 2025 (14 intermediate revisions by the same user not shown) Line 10: Line 10:   This page provides information about the ... [More] '''GCOS'''-related offerings on Multics.   This page provides information about the '''GCOS'''-related offerings on Multics.     − Honeywell had three primary operating system offerings for the Honeywell [https://en.wikipedia.org/wiki/Honeywell_6000_series 6000 series]: [https://multicians.org/ '''Multics'''], [https://en.wikipedia.org/wiki/Honeywell_CP-6 '''CP‑6'''] (another time sharing system), and [https://en.wikipedia.org/wiki/General_Comprehensive_Operating_System#GCOS_7_and_GCOS_8 '''GCOS'''] ('''General Comprehensive Operating System'''). Honeywell GCOS began as General Electric GECOS‑I for the GE‑600 in 1963 (predating IBM's OS ∕ 360 and DOS ∕ 360).  While Multics was being offered, '''GCOS III''' (GCOS‑3) was the version of GCOS primarily in use. (The successor, GCOS‑8, began life in 1978, but GCOS III maintenance continued until September 1987.) + Honeywell had three primary operating system offerings for the Honeywell [https://en.wikipedia.org/wiki/Honeywell_6000_series 6000 series]: [https://multicians.org/ '''Multics'''], [https://en.wikipedia.org/wiki/Honeywell_CP-6 '''CP‑6'''] (another time sharing system), and [https://en.wikipedia.org/wiki/General_Comprehensive_Operating_System#GCOS_7_and_GCOS_8 '''GCOS'''] ('''General Comprehensive Operating System''').       Many Multics sites were [https://apps.dtic.mil/sti/html/tr/ADA013109/index.html upgrading from GCOS III systems to Multics], or continued running GCOS systems, so they had a large amount of GCOS data files and application programs they wished to—or needed to—keep using.   Many Multics sites were [https://apps.dtic.mil/sti/html/tr/ADA013109/index.html upgrading from GCOS III systems to Multics], or continued running GCOS systems, so they had a large amount of GCOS data files and application programs they wished to—or needed to—keep using.   +   + == 36-bit GCOS Evolution ==   +   + Honeywell GCOS began as General Electric GECOS (or GECOS I) for the GE‑600 in 1963 (predating IBM's OS/⁠360 and DOS/⁠360).  While Multics was being commercially offered, '''GCOS III''' (GCOS‑3) was the version of GCOS primarily in use. (The successor, GCOS‑8, began life in 1979, but GCOS III maintenance continued on, until September 1987.)   +   + === Timeline ===   +   + {| class="wikitable"   + ! Name   + ! Introduction   + ! System   + |-   + | '''GECOS'''   + | 1963   + | GE-600   + |-   + | '''GECOS II'''   + | 1965   + | GE-635   + |-   + | '''GECOS III'''   + | 1969   + | GE-655   + |-   + | '''GCOS III'''   + | 1971   + | Honeywell 6000   + |-   + | '''GCOS-8'''   + | 1979   + | Honeywell DPS-8   + |}   +   + Note this table presents the ''generation'' of the GCOS system software, not the specific version (''e.g.'' 4JS2, 4JS3, SR2500, SR3000).       == GCOS on Multics ==   == GCOS on Multics == Line 42: Line 76:   The version of GCOS software supplied with Multics is '''GCOS III Release 4JS3'''.   The version of GCOS software supplied with Multics is '''GCOS III Release 4JS3'''.     − * This GCOS release is from the early 1980s and represents GCOS III near the end of it's life. GCOS III was succeeded by GCOS 8 (first called "GCOS‑66", then "GCOS 8000", then renamed and styled as "GCOS‑8") which is the GCOS [https://eviden.com/solutions/enterprise-servers/mainframe-servers/bullsequana-m/ still available today from Atos] (along with the related—but ''not'' 36‑bit—GCOS‑7 systems, as well as the GCOS‑derived [https://jpn.nec.com/products/acosclub/ NEC ACOS] line). + * This GCOS release is from the 1980s and represents GCOS III near the end of it's life. GCOS III was succeeded by GCOS 8 (or "GCOS 8000") usually styled as "GCOS‑8", which is the GCOS [https://eviden.com/solutions/enterprise-servers/mainframe-servers/bullsequana-m/ still available today from Eviden] (along with the related—but ''not'' 36‑bit—GCOS‑7 systems, as well as the GCOS‑derived [https://jpn.nec.com/products/acosclub/ NEC ACOS] line).       Unfortunately, there are a few bits of software missing in the stock Multics GCOS offering, and we do not have a GCOS ''Total System Tape'' that would allow us to install them.  However, it is still very usable as is, and gives a good feel for how batch processing and time sharing was done in the 1960s and 1970s (and sometimes even in the early 1980s).   Unfortunately, there are a few bits of software missing in the stock Multics GCOS offering, and we do not have a GCOS ''Total System Tape'' that would allow us to install them.  However, it is still very usable as is, and gives a good feel for how batch processing and time sharing was done in the 1960s and 1970s (and sometimes even in the early 1980s). Line 50: Line 84:   One of the more confusing aspects of running GCOS under Multics is that GCOS really wants everything to be encoded in the 6‑bit '''GBCD''' (GCOS ''Binary Coded Decimal'', ''see'' [https://en.wikipedia.org/wiki/BCD_(character_encoding) ''Wikipedia:BCD'']) character set.   One of the more confusing aspects of running GCOS under Multics is that GCOS really wants everything to be encoded in the 6‑bit '''GBCD''' (GCOS ''Binary Coded Decimal'', ''see'' [https://en.wikipedia.org/wiki/BCD_(character_encoding) ''Wikipedia:BCD'']) character set.     − Multics, on the other hand, really wants '''ASCII''' encoding. This can cause some obscure issues when the two are working together. The Multics interface to GCOS will perform the appropriate character conversions of input decks and printed output, but when dealing with disk files or tapes, care must be taken to understand which character set in use. + Multics, on the other hand, really wants '''ASCII''' encoding. This can cause some obscure issues when the two are working together. The Multics interface to GCOS will perform the appropriate character conversions of input decks and printed output, but when dealing with disk files (segments) or tapes, care must be taken to understand which character set in use.       There is a Multics utility, '''gcu''' (gcos_card_utility) that can help in converting between GBCD and ASCII. Some examples of it's use will be shown later.  You can find the '''GBCD''' character set defined in the [https://bitsavers.org/pdf/honeywell/large_systems/GCOS/BS16_GMAP_Pocket_Guide_Jul74.pdf GMAP Pocket Guide (''Honeywell BS16r1'', 1974), pg. 31].   There is a Multics utility, '''gcu''' (gcos_card_utility) that can help in converting between GBCD and ASCII. Some examples of it's use will be shown later.  You can find the '''GBCD''' character set defined in the [https://bitsavers.org/pdf/honeywell/large_systems/GCOS/BS16_GMAP_Pocket_Guide_Jul74.pdf GMAP Pocket Guide (''Honeywell BS16r1'', 1974), pg. 31]. Line 63: Line 97:       * For a high-level overview of the GCOS III system software that was distributed by Honeywell in the mid-70s, see the [https://bitsavers.org/pdf/honeywell/large_systems/GCOS/DE61_Level_66_System_Software_Overview_197607.pdf Honeywell Series‑60 ∕ Level‑66 System Software Overview (''DE61'', 1976)] manual.   * For a high-level overview of the GCOS III system software that was distributed by Honeywell in the mid-70s, see the [https://bitsavers.org/pdf/honeywell/large_systems/GCOS/DE61_Level_66_System_Software_Overview_197607.pdf Honeywell Series‑60 ∕ Level‑66 System Software Overview (''DE61'', 1976)] manual.   +   + Note that some software works only in batch mode, some works only in time sharing, and some works in both environments.       === Available Software ===   === Available Software === Line 235: Line 271:       === Unsupported Software ===   === Unsupported Software === −   − Note that some software works only in batch mode, some works only in time sharing, and some works in both environments.         The following software is, unfortunately, '''not supported''' (at all) in the Multics GCOS simulation (and it would require considerable effort to modify the Multics software to enable support):   The following software is, unfortunately, '''not supported''' (at all) in the Multics GCOS simulation (and it would require considerable effort to modify the Multics software to enable support): Line 341: Line 375:   === Further Reading ===   === Further Reading ===     − More information and additional examples of GCOS III JCL is available in the ''University of Houston'''s [https://dn721600.ca.archive.org/0/items/a-guide-to-job-control-language-on-the-honeywell-66-60/A%20Guide%20to%20Job%20Control%20Language%20on%20the%20Honeywell%2066-60_text.pdf "''Guide to Job Control Language on the Honeywell 66/60''"]. + More information and additional examples of GCOS III JCL is available in the ''University of Houston'''s [https://dn721600.ca.archive.org/0/items/a-guide-to-job-control-language-on-the-honeywell-66-60/A%20Guide%20to%20Job%20Control%20Language%20on%20the%20Honeywell%2066-60_text.pdf ''"Guide to Job Control Language on the Honeywell 66/60"''].       == GCOS Batch Simulator ==   == GCOS Batch Simulator == Line 582: Line 616:   * This deck demonstrates the '''UTILITY''' card being used to copy files, using the previously mentioned [https://multics-wiki.swenson.org/index.php/GCOS#Utility_System '''Utility''' system].   * This deck demonstrates the '''UTILITY''' card being used to copy files, using the previously mentioned [https://multics-wiki.swenson.org/index.php/GCOS#Utility_System '''Utility''' system].     − It first takes an input file from the job deck and copies to a permanent disk file. Then it makes a copy of the permanent disk file with a new name. + It first takes an input file from the job deck and writes to a permanent disk file. Then it makes a copy of the permanent disk file with a new name.         Line 833: Line 867:       :"The Federation of Bull Heritage Team" is an organization and museum "''dedicated to preserving and promoting the rich history and cultural significance of Groupe Bull and French data processing''".  FEB houses an exclusive collection of exhibits and historical documents relating to CII‑Honeywell‑Bull systems, including retrospectives and histories of the various GCOS systems (''i.e.'' [http://www.feb-patrimoine.com/projet/gcos8/large_systems.htm ''History of Major GCOS Systems'', 1998], [http://www.feb-patrimoine.com/english/gecos_to_gcos8_part_1.htm ''GECOS to GCOS‑8 History'', 2003: Part I], [http://www.feb-patrimoine.com/english/gecos_to_gcos8_part_2.htm Part II], [http://www.feb-patrimoine.com/english/gecos_to_gcos8_part_3.htm Part III]) from the European—and especially French—perspective.   :"The Federation of Bull Heritage Team" is an organization and museum "''dedicated to preserving and promoting the rich history and cultural significance of Groupe Bull and French data processing''".  FEB houses an exclusive collection of exhibits and historical documents relating to CII‑Honeywell‑Bull systems, including retrospectives and histories of the various GCOS systems (''i.e.'' [http://www.feb-patrimoine.com/projet/gcos8/large_systems.htm ''History of Major GCOS Systems'', 1998], [http://www.feb-patrimoine.com/english/gecos_to_gcos8_part_1.htm ''GECOS to GCOS‑8 History'', 2003: Part I], [http://www.feb-patrimoine.com/english/gecos_to_gcos8_part_2.htm Part II], [http://www.feb-patrimoine.com/english/gecos_to_gcos8_part_3.htm Part III]) from the European—and especially French—perspective. −   − = Artificial Intelligence Statement =   −   − * No artificial intelligence was used in the writing of this work.   [Less]

‎Useful Links ← Older revision Revision as of 15:23, 18 October 2025 Line 32: Line 32:   * [[GCOS]]   * [[GCOS]]   * [[Multics Graphics System]] (MGS)   * [[Multics Graphics System]] (MGS)   + * [[Hardware Emulation Project]]       == Multics Documentation ==   == Multics Documentation ==

Created page with " = Hardware Emulation Project = == Goals == The Hardware Emulation Project is an attempt to build a complete DPS8/M Mainframe on an FPGA. The final goal is to implement the..." New page = Hardware Emulation Project = == Goals ... [More] == The Hardware Emulation Project is an attempt to build a complete DPS8/M Mainframe on an FPGA. The final goal is to implement the following: * CPU (starting with one but eventually at least a dual-CPU system) * SCU (System Control Unit with at least 12 MWords of RAM, 36-bit words) * IOM (Input Output Multiplexer) * MSS (Mass Storage System, hard disk emulation using modern HD/SSD drives) * Tape Drive(s) (emulated with USB sticks) * Unit Record Devices (Card Reader/Punch and Line Printer, emulated using USB sticks and, possibly, USB printer for line printer) * Datanet 6678 Front-End Network Processor (supporting serial lines and TCP/IP connections) == Current State (as of 10/18/2025) == It was determined the best route to implement this project was to start with the Datanet FNP. This is actually a stand-alone mini-computer (for the era) that was designed around handling large numbers of terminals performing all terminal I/O and multiplexing via a single, direct interface link to the central system. It's been noted that it appears someone took the central system and chopped it in half to make the front end processor. Internally, it has a CPU and an IOM that interface to serial I/O cards of various types. The FNP can support asynchronous and synchronous communication links of several types. The goal of this phase has been to implement an FNP in an FPGA development board that communicates with the DPS8M software simulator just like the real FNP would have communicated with the original central system. This phase has been ongoing since 2021. The current state of the FNP is: * CPU fully implemented (18-bit words, 64KW of RAM, 96 instructions) * IOM initial framework implemented but no device emulation yet. There was also a partial implementation of a software simulator for the FNP written in C. In order to better understand the implementation of the FNP before continuing on the FPGA implementation, it was decided to attempt to finish the software simulator first. A TCP/IP protocol was developed (by Charles Anthony) and implemented in a special branch of the DPS8M software simulator. The other end was implemented by Charles in the FNP C simulator and the simulator was enhanced to be able to bootload the Multics Communications System software, downloaded from the DPS8M simulator. However, due to some significant limitations of the C implementation, and my (Dean S. Anderson) lack of understanding of it, I decided to do a full, multi-threaded implementation in a modern version of Java. That version is now mostly operational and can successfully bootload MCS and has a partial implementation of the HSLA (High Speed Line Adapter) that works via TCP/IP connections. Due to a lack of documentation of the HSLA/HMLC cards, however, there has been some issues in simulating the hardware so that MCS is happy with it. We are able to get some terminal I/O but there are significant issues that prevent actually logging in to Multics so far. The current focus is now on working through the issues between the hardware simulation and MCS. [Less]

‎Goals ← Older revision Revision as of 17:05, 18 October 2025 (7 intermediate revisions by the same user not shown) Line 1: Line 1:     − = Hardware Emulation Project = + = Project "Phoenix" =       ... [More] == Goals ==   == Goals == Line 11: Line 11:   * Tape Drive(s) (emulated with USB sticks)   * Tape Drive(s) (emulated with USB sticks)   * Unit Record Devices (Card Reader/Punch and Line Printer, emulated using USB sticks and, possibly, USB printer for line printer)   * Unit Record Devices (Card Reader/Punch and Line Printer, emulated using USB sticks and, possibly, USB printer for line printer) − * Datanet 6678 Front-End Network Processor (supporting serial lines and TCP/IP connections) + * [[Datanet 6678 Front-End Network Processor]] (supporting serial lines and TCP/IP connections)   +     + == Project Members ==   +     + * Project Lead: Dean S. Anderson   + ** A former employee of Honeywell Underseas Systems, Dean began his career in 1980 as a Computer Operator at Gelco, Inc., working on a Honeywell 66/60 dual-processor system running GCOS III. Over the years, he progressed through the Computer Operations Group, gaining extensive experience with Honeywell mainframes, and ultimately contributed by developing and implementing several custom modules within the GCOS III (4JS2) kernel.   + * Charles Anthony   + ** Charles, together with Harry Reed, played a central role in the development of the DPS8M software simulator, which enables Multics to run on modern systems. His contributions to the DN355 software simulator and the TCP/IP implementation for the Direct Interface Adapter (DIA)—allowing communication with an external Front-End Network Processor (FNP)—have been invaluable to the preservation and continued operation of Multics today.   +     + Also:   + * Eric Swenson and Jeffrey Johnson – Provide invaluable emotional support and encouragement, helping to sustain momentum and foster collaboration among the team.       == Current State (as of 10/18/2025) ==   == Current State (as of 10/18/2025) == Line 25: Line 35:       This phase has been ongoing since 2021. The current state of the FNP is:   This phase has been ongoing since 2021. The current state of the FNP is: − * CPU fully implemented (18-bit words, 64KW of RAM, 96 instructions) + * CPU fully implemented (18-bit words, 64KW of RAM, 98 instructions)   + ** AQ Register 36 bits (also addressable at separate 18-bit registers A and Q)   + ** Instruction Counter 15 bits   + ** Index Register (3) 18 bits   + ** I/0 Channel Selector 6 bits   + ** Indicator Register 8 bits   + * Memory Paging Unit (allows access up to 256KW of RAM)   * IOM initial framework implemented but no device emulation yet.   * IOM initial framework implemented but no device emulation yet.     Line 39: Line 55:       The current focus is now on working through the issues between the hardware simulation and MCS.   The current focus is now on working through the issues between the hardware simulation and MCS.   +   + == References ==   +   + The following table has links to various references (such as old manuals) that are actively in use for this proejct:   +   + {| class="wikitable"   + ! ID   + ! Description   + ! Link   + |-   + | AN85-01   + | SERIES 60 (LEVEL 68) MULTICS COMMUNICATION SYSTEM SYSTEM DESIGNERS' NOTEBOOK   + | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/AN85-01_commSysSDN_Oct79.pdf]   + |-   + | AN87-00A   + | SERIES 60 (LEVEL 68) MULTICS HARDWARE AND SOFTWARE FORMATS PROGRAM LOGIC MANUAL   + | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/AN87-00A_HwSwFmtsPLM_Mar80.pdf]   + |-   + | AY34-02B   + | 66/DPS, 68/DPS & DPS 8 DATANET 6641/6651/6661/6678 OPERATION   + | [http://www.bitsavers.org/pdf/honeywell/large_systems/datanet/AY34-02B_DATANET_Operation_Jun81.pdf]   + |-   + | CC75-01   + | MULTICS ADMINISTRATORS' MANUAL - COMMUNICATIONS   + | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/CC75-01B_adminManComms_Dec83.pdf]   + |-   + | CC92-01A   + | SERIES 60 (LEVEL 68) MULTICS PROGRAMMERS' MANUAL - COMMUNICATIONS INPUT/OUTPUT   + | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/CC92-01A_MPM_commIO_Jul82.pdf]   + |-   + | DC88-01   + | SERIES 60 (LEVEL 66) DATANET 6600 FRONT-END NETWORK PROCESSOR   + | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/swenson/dc88-01.790300.DC88-01.dn6600-fnp.88.pdf]   + |-   + | DD01   + | Datanet 355/6600 Macro Assembler Program   + | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/swenson/dd01-00.751200.mr-none.dn35-assembler.308.pdf]   + |-   + | FN01-03C   + | DATANET 66 SYSTEM AND INSTALLATION MANUAL   + | [http://www.bitsavers.org/pdf/honeywell/large_systems/datanet/FN01-03C_DATANET_66_System_Manual_May83.pdf]   + |} [Less]

Created page with "== Overview ==" New page== Overview ==

← Older revision Revision as of 17:13, 18 October 2025 (One intermediate revision by the same user not shown) Line 1: Line 1:   + [[Hardware Emulation Project]]   +   == Overview ==   == Overview ==   ... [More] +   + From AY-34 [http://www.bitsavers.org/pdf/honeywell/large_systems/datanet/AY34-02B_DATANET_Operation_Jun81.pdf]:   +   + ''The DATANET Network Processor encompasses a whole family of compact, powerful network processors which can provide Honeywell 66/DPS, 68/DPS and DPS 8 systems with largevolume network communications power. Based on Honeywell's minicomputer technology for reduced space, greater reliability, and easier serviceability, the DATANET is logically compatible with the system software and user-generated programs of the DATANET 6600 family of network processors.''   +   + ''The DATANET provides the variety of interfaces required by the elements and protocols of a distributed system, as well as a facility for dialog with the central system. By performing the tasks of message            management and message handling, the processor relieves the central system for other processing functions. The resources of the central system are called upon only when the message is submitted for information processing. However, some networking functions (e.g., a message switch) can be accommodated by the processor without any involvement of the host processor.'' [Less]

← Older revision Revision as of 17:14, 18 October 2025 Line 55: Line 55:       The current focus is now on working through the issues between the hardware simulation and MCS.   The current focus is now ... [More] on working through the issues between the hardware simulation and MCS. −   − == References ==   −   − The following table has links to various references (such as old manuals) that are actively in use for this proejct:   −   − {| class="wikitable"   − ! ID   − ! Description   − ! Link   − |-   − | AN85-01   − | SERIES 60 (LEVEL 68) MULTICS COMMUNICATION SYSTEM SYSTEM DESIGNERS' NOTEBOOK   − | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/AN85-01_commSysSDN_Oct79.pdf]   − |-   − | AN87-00A   − | SERIES 60 (LEVEL 68) MULTICS HARDWARE AND SOFTWARE FORMATS PROGRAM LOGIC MANUAL   − | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/AN87-00A_HwSwFmtsPLM_Mar80.pdf]   − |-   − | AY34-02B   − | 66/DPS, 68/DPS & DPS 8 DATANET 6641/6651/6661/6678 OPERATION   − | [http://www.bitsavers.org/pdf/honeywell/large_systems/datanet/AY34-02B_DATANET_Operation_Jun81.pdf]   − |-   − | CC75-01   − | MULTICS ADMINISTRATORS' MANUAL - COMMUNICATIONS   − | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/CC75-01B_adminManComms_Dec83.pdf]   − |-   − | CC92-01A   − | SERIES 60 (LEVEL 68) MULTICS PROGRAMMERS' MANUAL - COMMUNICATIONS INPUT/OUTPUT   − | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/CC92-01A_MPM_commIO_Jul82.pdf]   − |-   − | DC88-01   − | SERIES 60 (LEVEL 66) DATANET 6600 FRONT-END NETWORK PROCESSOR   − | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/swenson/dc88-01.790300.DC88-01.dn6600-fnp.88.pdf]   − |-   − | DD01   − | Datanet 355/6600 Macro Assembler Program   − | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/swenson/dd01-00.751200.mr-none.dn35-assembler.308.pdf]   − |-   − | FN01-03C   − | DATANET 66 SYSTEM AND INSTALLATION MANUAL   − | [http://www.bitsavers.org/pdf/honeywell/large_systems/datanet/FN01-03C_DATANET_66_System_Manual_May83.pdf]   − |}   [Less]

← Older revision Revision as of 17:14, 18 October 2025 Line 8: Line 8:       ''The DATANET provides the variety of interfaces required by the elements and protocols of a distributed system, as well as a ... [More] facility for dialog with the central system. By performing the tasks of message            management and message handling, the processor relieves the central system for other processing functions. The resources of the central system are called upon only when the message is submitted for information processing. However, some networking functions (e.g., a message switch) can be accommodated by the processor without any involvement of the host processor.''   ''The DATANET provides the variety of interfaces required by the elements and protocols of a distributed system, as well as a facility for dialog with the central system. By performing the tasks of message            management and message handling, the processor relieves the central system for other processing functions. The resources of the central system are called upon only when the message is submitted for information processing. However, some networking functions (e.g., a message switch) can be accommodated by the processor without any involvement of the host processor.''   +   +   + == References ==   +   + The following table has links to various references (such as old manuals) that are actively in use for this phase of the project:   +   + {| class="wikitable"   + ! ID   + ! Description   + ! Link   + |-   + | AN85-01   + | SERIES 60 (LEVEL 68) MULTICS COMMUNICATION SYSTEM SYSTEM DESIGNERS' NOTEBOOK   + | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/AN85-01_commSysSDN_Oct79.pdf]   + |-   + | AN87-00A   + | SERIES 60 (LEVEL 68) MULTICS HARDWARE AND SOFTWARE FORMATS PROGRAM LOGIC MANUAL   + | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/AN87-00A_HwSwFmtsPLM_Mar80.pdf]   + |-   + | AY34-02B   + | 66/DPS, 68/DPS & DPS 8 DATANET 6641/6651/6661/6678 OPERATION   + | [http://www.bitsavers.org/pdf/honeywell/large_systems/datanet/AY34-02B_DATANET_Operation_Jun81.pdf]   + |-   + | CC75-01   + | MULTICS ADMINISTRATORS' MANUAL - COMMUNICATIONS   + | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/CC75-01B_adminManComms_Dec83.pdf]   + |-   + | CC92-01A   + | SERIES 60 (LEVEL 68) MULTICS PROGRAMMERS' MANUAL - COMMUNICATIONS INPUT/OUTPUT   + | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/CC92-01A_MPM_commIO_Jul82.pdf]   + |-   + | DC88-01   + | SERIES 60 (LEVEL 66) DATANET 6600 FRONT-END NETWORK PROCESSOR   + | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/swenson/dc88-01.790300.DC88-01.dn6600-fnp.88.pdf]   + |-   + | DD01   + | Datanet 355/6600 Macro Assembler Program   + | [http://www.bitsavers.org/pdf/honeywell/large_systems/multics/swenson/dd01-00.751200.mr-none.dn35-assembler.308.pdf]   + |-   + | FN01-03C   + | DATANET 66 SYSTEM AND INSTALLATION MANUAL   + | [http://www.bitsavers.org/pdf/honeywell/large_systems/datanet/FN01-03C_DATANET_66_System_Manual_May83.pdf]   + |} [Less]

← Older revision Revision as of 17:35, 18 October 2025 (2 intermediate revisions by the same user not shown) Line 23: Line 23:   * Eric Swenson and Jeffrey Johnson – Provide invaluable emotional support and ... [More] encouragement, helping to sustain momentum and foster collaboration among the team.   * Eric Swenson and Jeffrey Johnson – Provide invaluable emotional support and encouragement, helping to sustain momentum and foster collaboration among the team.     − == Current State (as of 10/18/2025) == + == Project Phases ==     − It was determined the best route to implement this project was to start with the Datanet FNP. This is actually a stand-alone mini-computer (for the era) that + === Phase 1: Implement the Datanet FNP on an FPGA === − was designed around handling large numbers of terminals performing all terminal I/O and multiplexing via a single, direct interface link to the central system. + * This phase is attempting to implement the FNP on a DE-10 Lite FPGA Development Board.   + * Status: Currently in progress (see [[Datanet 6678 Front-End Network Processor]])     − It's been noted that it appears someone took the central system and chopped it in half to make the front end processor. Internally, it has a CPU and an IOM that + === Phase 2: Determine DPS8M Implementation Strategy === − interface to serial I/O cards of various types. The FNP can support asynchronous and synchronous communication links of several types. + * There has been some discussion around the best way to implement the rest of the system. There are two primary options: −   + *# Create a version of the DPS8M software simulator that runs on an ARM Core on an FPGA Development Board (such as the DE-10 Nano) and then start moving parts of it into the FPGA, probably starting with the SCU/RAM). − The goal of this phase has been to implement an FNP in an FPGA development board that communicates with the DPS8M software simulator just like the real FNP would + *#* This is the "inside out" approach. − have communicated with the original central system. + *#* The advantage here is that very high speed communications are possible with the internal ARM core connecting directly to the FPGA. −   + *#* The disadvantage here is that getting the DPS8 simulator working on the ARM core looks like it could be a difficult task. − This phase has been ongoing since 2021. The current state of the FNP is: + *# Start adding more peripheral device emulation using the DE-10 Lite to communicate with the software simulator (running on a Raspberry PI) in a manner similar to the FNP emulation. − * CPU fully implemented (18-bit words, 64KW of RAM, 98 instructions) + *#* This is the "outside in" approach. − ** AQ Register 36 bits (also addressable at separate 18-bit registers A and Q) + *#* The advantage of this approach is that simpler components are implemented first and grow in complexity as implementation proceeds providing a nice "ramp up" in FPGA skills and expertise. − ** Instruction Counter 15 bits + *#* The disadvantage is that an external, high-speed communications method is required between the Raspberry PI and the DE-10 Lite board. The initial thought is to create a 9-bit parallel bus between the PI and DE-10 for the simulated peripherals. This will certainly be fast enough for unit record devices and probably tape drives but when you add mass storage devices, will it be fast enough? − ** Index Register (3) 18 bits + − ** I/0 Channel Selector 6 bits + − ** Indicator Register 8 bits + − * Memory Paging Unit (allows access up to 256KW of RAM) + − * IOM initial framework implemented but no device emulation yet. + −   + − There was also a partial implementation of a software simulator for the FNP written in C. In order to better understand the implementation of the FNP before continuing + − on the FPGA implementation, it was decided to attempt to finish the software simulator first. A TCP/IP protocol was developed (by Charles Anthony) and implemented in a + − special branch of the DPS8M software simulator. The other end was implemented by Charles in the FNP C simulator and the simulator was enhanced to be able to bootload + − the Multics Communications System software, downloaded from the DPS8M simulator. + −   + − However, due to some significant limitations of the C implementation, and my (Dean S. Anderson) lack of understanding of it, I decided to do a full, multi-threaded + − implementation in a modern version of Java. That version is now mostly operational and can successfully bootload MCS and has a partial implementation of the HSLA + − (High Speed Line Adapter) that works via TCP/IP connections. Due to a lack of documentation of the HSLA/HMLC cards, however, there has been some issues in simulating + − the hardware so that MCS is happy with it. We are able to get some terminal I/O but there are significant issues that prevent actually logging in to Multics so far. + −   + − The current focus is now on working through the issues between the hardware simulation and MCS. + [Less]

← Older revision Revision as of 17:35, 18 October 2025 Line 8: Line 8:       ''The DATANET provides the variety of interfaces required by the elements and protocols of a distributed system, as well as a ... [More] facility for dialog with the central system. By performing the tasks of message            management and message handling, the processor relieves the central system for other processing functions. The resources of the central system are called upon only when the message is submitted for information processing. However, some networking functions (e.g., a message switch) can be accommodated by the processor without any involvement of the host processor.''   ''The DATANET provides the variety of interfaces required by the elements and protocols of a distributed system, as well as a facility for dialog with the central system. By performing the tasks of message            management and message handling, the processor relieves the central system for other processing functions. The resources of the central system are called upon only when the message is submitted for information processing. However, some networking functions (e.g., a message switch) can be accommodated by the processor without any involvement of the host processor.''   +   + == Current State (as of 10/18/2025) ==   +   + It was determined the best route to implement this project was to start with the Datanet FNP. This is actually a stand-alone mini-computer (for the era) that   + was designed around handling large numbers of terminals performing all terminal I/O and multiplexing via a single, direct interface link to the central system.   +   + It's been noted that it appears someone took the central system and chopped it in half to make the front end processor. Internally, it has a CPU and an IOM that   + interface to serial I/O cards of various types. The FNP can support asynchronous and synchronous communication links of several types.   +   + The goal of this phase has been to implement an FNP in an FPGA development board that communicates with the DPS8M software simulator just like the real FNP would   + have communicated with the original central system.   +   + This phase has been ongoing since 2021. The current state of the FNP is:   + * CPU fully implemented (18-bit words, 64KW of RAM, 98 instructions)   + ** AQ Register 36 bits (also addressable at separate 18-bit registers A and Q)   + ** Instruction Counter 15 bits   + ** Index Register (3) 18 bits   + ** I/0 Channel Selector 6 bits   + ** Indicator Register 8 bits   + * Memory Paging Unit (allows access up to 256KW of RAM)   + * IOM initial framework implemented but no device emulation yet.   +   + There was also a partial implementation of a software simulator for the FNP written in C. In order to better understand the implementation of the FNP before continuing   + on the FPGA implementation, it was decided to attempt to finish the software simulator first. A TCP/IP protocol was developed (by Charles Anthony) and implemented in a   + special branch of the DPS8M software simulator. The other end was implemented by Charles in the FNP C simulator and the simulator was enhanced to be able to bootload   + the Multics Communications System software, downloaded from the DPS8M simulator.   +   + However, due to some significant limitations of the C implementation, and my (Dean S. Anderson) lack of understanding of it, I decided to do a full, multi-threaded   + implementation in a modern version of Java. That version is now mostly operational and can successfully bootload MCS and has a partial implementation of the HSLA   + (High Speed Line Adapter) that works via TCP/IP connections. Due to a lack of documentation of the HSLA/HMLC cards, however, there has been some issues in simulating   + the hardware so that MCS is happy with it. We are able to get some terminal I/O but there are significant issues that prevent actually logging in to Multics so far.   +   + The current focus is now on working through the issues between the hardware simulation and MCS.         [Less]