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Commits
: Listings
Analyzed
about 12 hours
ago. based on code collected
1 day
ago.
Apr 30, 2023 — Apr 30, 2024
Showing page 22 of 26
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Added license string, restrict layer to the logo and some GND vias to the logic board.
Piotr Esden-Tempski
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almost 15 years ago
Finished routing the logic board!
Piotr Esden-Tempski
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almost 15 years ago
More routing work on the logic board. 5airwires to go.
Piotr Esden-Tempski
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almost 15 years ago
Further work on routing. LED's and the +5V of the USB/CAN connector are still missing. (nearly finished)
Piotr Esden-Tempski
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almost 15 years ago
Now the right logic brd layout should be commited. Removed the jumpers after the opamps to save even more space on the logic board.
Piotr Esden-Tempski
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almost 15 years ago
Started routing. JTAG, I2C/PWM, USART and USB/CAN connectors are routed now.
Piotr Esden-Tempski
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almost 15 years ago
Sorted all the components on the logic board together in functional pieces and made preliminary positioning.
Piotr Esden-Tempski
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almost 15 years ago
Removed one of the big tantals on the logic board, replaced the opamp with a smaller tssop-14 version. Everything to save space. Layouting the logic board will be a nice puzzle anyways.
Piotr Esden-Tempski
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almost 15 years ago
Replaced the crystal resonator with a small oscillator.
Piotr Esden-Tempski
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almost 15 years ago
Added version string to the power stage layout.
Piotr Esden-Tempski
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almost 15 years ago
Created eagle project for the logic board layout.
Piotr Esden-Tempski
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almost 15 years ago
Corrected pinouts of the logic to power connection headers.
Piotr Esden-Tempski
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almost 15 years ago
Added Open-BLDC logo and some text to the board layout. Just for the fun of it.
Piotr Esden-Tempski
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almost 15 years ago
Routed the charge pump. Changed the orientation of the logic board, it seems to make everything much more streightforward. Reordered some pins on the power/sensor connector, to clean up some ugly mess. (Now we really have to start routing the logic board to see if that pinout and size are feasable at all)
Piotr Esden-Tempski
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almost 15 years ago
Nearly finished the first approach to the powerstage routing. The chargepump and global current sensor are not routed yet.
Piotr Esden-Tempski
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almost 15 years ago
Layouted the bridge drivers on the powerstage.
Piotr Esden-Tempski
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almost 15 years ago
Started to layout the powerstage. (Some preliminary tests)
Piotr Esden-Tempski
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almost 15 years ago
Renamed the nets behind current sensors to make routing easier.
Piotr Esden-Tempski
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almost 15 years ago
Added another stabilization tantal for the bridge driver, +12V supply, rail.
Piotr Esden-Tempski
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almost 15 years ago
Corrected the name of the voltage divider net name (V_BATT) on the powerstage.
Piotr Esden-Tempski
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almost 15 years ago
Replaced the duo array resistors with single ones. Replaced the 0603 led resistor array with 1206.
Piotr Esden-Tempski
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almost 15 years ago
Corrected series resistor values of the USART connector.
Piotr Esden-Tempski
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almost 15 years ago
Added >NAME and >VALUE to ST662A charge pump symbol.
Piotr Esden-Tempski
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almost 15 years ago
Connected the PowerStage_ID to +3V3 is better then +12V. :)
Piotr Esden-Tempski
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almost 15 years ago
Connected SHDN pin of the bridge driver charge pump to gnd. Otherwise the charge pump is always off.
Piotr Esden-Tempski
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almost 15 years ago
Added an HC49UP crystal. As it seems we need an external crystal at the end. The internal 8MHz quarz is not exact enough for USB and the maximal clock one can get out of it is 64MHz and not 72Mhz. :(
Piotr Esden-Tempski
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almost 15 years ago
Replaced single solder jumpers with smaller ones. The same style as the SJ2 ones.
Piotr Esden-Tempski
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almost 15 years ago
Connected USB_+5V to the +5V rail.
Piotr Esden-Tempski
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almost 15 years ago
Some little tweeks on the STM32 symbol in the library. Replaced the scattered STM32 symbol with the single one contained in the open-bldc.lbr.
Piotr Esden-Tempski
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almost 15 years ago
Some little fixes based on ERC check.
Piotr Esden-Tempski
More...
almost 15 years ago
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