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Analyzed over 2 years ago. based on code collected almost 3 years ago.

Project Summary

A FPGA friendly 32 bit RISC-V CPU implementation

Tags

cpu risc_v

Project Security

Vulnerabilities per Version ( last 10 releases )

There are no reported vulnerabilities

Project Vulnerability Report

Security Confidence Index

Poor security track-record
Favorable security track-record

Vulnerability Exposure Index

Many reported vulnerabilities
Few reported vulnerabilities

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About Project Security

Languages

Assembly
63%
Scala
22%
C++
8%
6 Other
7%

30 Day Summary

Sep 10 2019 — Oct 10 2019

12 Month Summary

Oct 10 2018 — Oct 10 2019
  • 314 Commits
    Up + 33 (11%) from previous 12 months
  • 8 Contributors
    Down -1 (11%) from previous 12 months