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Commits : Listings

Analyzed 1 day ago. based on code collected 1 day ago.
Sep 02, 2024 — Sep 02, 2025
Commit Message Contributor Files Modified Lines Added Lines Removed Code Location Date
ADD: trace tile instantiation and connection
Lux
More... 8 months ago
ADD: tacit trace encoder, controller, and sink
Lux
More... 8 months ago
ADD: core insn trace ingress generation
Lux
More... 8 months ago
fix `hartReset` in DM More... 8 months ago
fix BitPat for Vector Mask-Register Logical Instructions More... 9 months ago
Support multiple ROMs More... 10 months ago
Merge pull request #3696 from moniriki/moniriki/rocket_cg_rocc_bug_fix_issue3695 More... 10 months ago
Fix clock gating bug inside RocketCore when the RoCC is busy More... 10 months ago
fix(RVCDecoder): c.addi4spn with imm=0 should be reserved More... 10 months ago
Merge pull request #3693 from chipsalliance/rocket-rational-cdcs More... 10 months ago
Merge pull request #3692 from chipsalliance/vset-trap More... 10 months ago
Support either rational direction for rocket rational CDCs More... 10 months ago
vsets should trap when mstatus.VS is off More... 10 months ago
Merge pull request #3691 from chipsalliance/abejgonzalez-patch-2 More... 11 months ago
Move `desiredName` override to top of `LazyModuleImp` More... 11 months ago
Merge pull request #3690 from chipsalliance/non-v-vector-illegal More... 11 months ago
Support non-V, but with-vector implementations More... 11 months ago
Merge pull request #3683 from chipsalliance/bensternthal-patch-1 More... 12 months ago
Add RocketChip Technical Charter More... 12 months ago
Merge pull request #3676 from chipsalliance/cp_prio More... 12 months ago
VM disabled: support larger physical addresses (#3682) More... about 1 year ago
Merge pull request #3674 from libresilicon/litex2 More... about 1 year ago
Merge pull request #3678 from PhilippKaesgen/fix_replayq More... about 1 year ago
increase depth of SimpleHellaCacheIFReplayQ More... about 1 year ago
Merge pull request #3675 from chipsalliance/dev More... about 1 year ago
Prioritize co-processor FP reqs over FPU reqs More... about 1 year ago
Adding support for Litex More... about 1 year ago
Merge pull request #3670 from chipsalliance/vec_bypasses More... about 1 year ago
Fix bit indices for rd when computing AVL for vsets More... about 1 year ago
Prevent bypasses from vector instructions More... about 1 year ago