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Analyzed about 17 hours ago. based on code collected 1 day ago.

Commit Message	Contributor	Files Modified	Lines Added	Lines Removed	Code Location	Date
May 21, 2023 — May 21, 2024 Showing page 3 of 289 Search / Filter on:
bump mill and Chisel	Jiuyang Liu	More...				10 months ago
remove import Chisel from Nodes (#3463)	Jiuyang Liu	More...				10 months ago
remove import Chisel from LazyModule (#3462)	Jiuyang Liu	More...				10 months ago
disable arch test in CI for now (#3461)	Jiuyang Liu	More...				10 months ago
Remove NotStrictInferReset compile option (#3416)	Jiuyang Liu	More...				10 months ago
New BundleMap (#3419)	Jiuyang Liu	More...				10 months ago
remove EnhancedChisel3Assign (#3451)	Jiuyang Liu	More...				10 months ago
PTW: set ae_ptw for out-of-range non-leaf PTEs (#3407) (#3410)	mergify[bot]	More...				10 months ago
CSR: add mconfigptr and default to zero (#3446)	Yinan Xu	More...				10 months ago
totally remove compatibility mode(w/o diplomacy) (#3415)	Jiuyang Liu	More...				10 months ago
Remove Late Cancel contract to make TileLink implementation compatible with spec (#3412)	Jiuyang Liu	More...				10 months ago
Remove GenericParameterizedBundle since we already have autoclonetype in chisel (#3417)	Jiuyang Liu	More...				10 months ago
Remove HasRocketChipStageUtils since it is dead (#3418)	Jiuyang Liu	More...				10 months ago
PTW: set ae_ptw for out-of-range non-leaf PTEs (#3407)	Yinan Xu	More...				11 months ago
Merge pull request #3405 from chipsalliance/mergify/bp/master/pr-3388	Jerry Zhao	More...				11 months ago
Enable WARL custom CSRs, long-latency CSR accesses (#3388)	Jerry Zhao	More...				11 months ago
Enable WARL custom CSRs, long-latency CSR accesses (#3388)	Jerry Zhao	More...				11 months ago
Merge pull request #3403 from chipsalliance/mergify/bp/master/pr-3401	Jerry Zhao	More...				11 months ago
CSR: optionally set delegable hypervisor exceptions (#3401)	Yinan Xu	More...				11 months ago
CSR: optionally set delegable hypervisor exceptions (#3401)	Yinan Xu	More...				11 months ago
TLB: vsstatus.SUM check should not apply to Stage-2 fault before Stage-1 response (#3393) (#3399)	mergify[bot]	More...				11 months ago
TLB: vsstatus.SUM check should not apply to Stage-2 fault before Stage-1 response (#3393)	John Ingalls	More...				11 months ago
TLB: must_alloc swapped AMO Logical/Arithmetic (#3390)	mergify[bot]	More...				11 months ago
Merge pull request #3389 from chipsalliance/tlb_must_alloc_paa_pal	Jiuyang Liu	More...				11 months ago
TLB: must_alloc swapped AMO Logical/Arithmetic	John Ingalls	More...				11 months ago
fix: bit extraction use .U.extract(i) (#3263) (#3385)	mergify[bot]	More...				11 months ago
fix: empty argument list (#3262) (#3386)	mergify[bot]	More...				11 months ago
fix: Werror match may not be exhaustive (#3268) (#3384)	mergify[bot]	More...				11 months ago
fix: empty argument list (#3262)	SingularityKChen	More...				11 months ago
fix: bit extraction use .U.extract(i) (#3263)	SingularityKChen	More...				11 months ago

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